BS IEC 62530:2007

Standard for SystemVerilog. Unified hardware design, specification and verification language.

STANDARD published on 31.12.2007

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The information about the standard:

Designation standards: BS IEC 62530:2007
Note: WITHDRAWN
Publication date standards: 31.12.2007
The number of pages: 664
Approximate weight : 2023 g (4.46 lbs)
Country: British technical standard
Category: Technical standards BS