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Standard for Verilog register transfer level synthesis.
STANDARD published on 5.12.2005
Designation standards: BS IEC 62142:2005
Note: WITHDRAWN
Publication date standards: 5.12.2005
SKU: NS-107115
The number of pages: 112
Approximate weight : 367 g (0.81 lbs)
Country: British technical standard
Category: Technical standards BS
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