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Semiconductor devices - Reliability test method for silicon carbide discrete metal-oxide semiconductor field effect transistors - Part 1: Test method for bias temperature instability
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STANDARD published on 21.4.2022
Designation standards: IEC 63275-1-ed.1.0
Publication date standards: 21.4.2022
SKU: NS-1055629
The number of pages: 25
Approximate weight : 75 g (0.17 lbs)
Country: International technical standard
Category: Technical standards IEC
IEC 63275-1:2022 gives a test method to evaluate gate threshold voltage shift of silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) using room temperature readout after applying continuous positive gate-source voltage stress at elevated temperature. The proposed method accepts a certain amount of recovery by allowing large delay times between stress and measurement (up to 10 h). L’IEC 63275-1:2022 donne une methode d’essai pour evaluer le decalage de la tension de seuil de grille des transistors a effet de champ metal-oxyde-semiconducteurs (MOSFET) de puissance en carbure de silicium (SiC) en utilisant un releve a temperature ambiante apres avoir applique une contrainte de tension grille-source positive continue a temperature elevee. La methode proposee accepte une certaine quantite de recouvrement en autorisant des decalages importants entre la contrainte et la mesure (jusqu’a 10 h).
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